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Thread: DDR DRAM FAQ

  1. #1
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    Lightbulb RAM comparison

    Dear Kaye,

    Quote Originally Posted by kaye
    Oh and while I'm begging Costa, how does the RAM compare in speed to MDD RAM or G5 DP RAM, or what Mac RAM does it compare to? k
    A very good question and a hard question to answer with appropriate "easy-to-understand" language. (Besides: I am still learning).

    Well, then.... let's give it a try:
    Typicall SDRAM modules, like the ones we have been using up to the PowerMac QS series, operate strictly in accordance to a JEDEC standard where RAM cells' information is handed to the Memory Controller (or "Chipset") during the rising - or the "top electronic wave" - of a system Clock Cycle. The Clock Cycle is generated by the Memory Controller and it "happens" along the Front System Bus (= FSB - an electronic in-printed circuit in our motherboards, connecting the Chipset [MC] to the other internal peripherals & components inside our 'puter).
    I'll try to make a quick sketch of the above data transfer:

    ---------[**]--------------[**]----------->
    ____|=====|_____|======|_______>

    Where [**] = the data being transfered, and the "bumps" indicating the clock cycle "wave" or rising.

    O.k. so far? Are you with me? The above is how data is transfered with traditional SDRAM devices (PC100 or PC133 stuff).

    From the MDD PowerMac onwards, DDR SDRAM made its appearance even in the Mac world. This because of the traditional frequency limitation SDRAM modules are bound to, due to their very architecture. With ever faster CPUs and general speed growing needs, it is obvious that future computers will need even faster RAM capable of coping with FSB clock frequencies well in excess of 133MHz.
    One easy way out of this limitation was to desing a SDRAM device capable of quickly handle doubling frequencies and the idea of DDR memory soon was made reality.
    By adding 16 pins more than the traditional SDRAM module, the DDR RAM module was created and the devices mounted on such module are capable to hand over to the Memory Controller information during *BOTH* the rising and falling edges of the Clock Cycle frequency "wave"; i.e.:

    _____|=========|________|=========|_______>
    -------[**]---------[**]-----------[**]---------[**]-------->

    (I apologise for the rudimentary sketch, but I hope you'll get the idea just the same).
    This symple idea has allowed technicians to provide instantly RAM devices capable of delivering their information stably at double the frequencies they used to have before.
    To use such DDR RAM modules though, you need an 184-pin capable RAM bus on the mother board and a Memory Controller (or Chipset) capable of "collecting" the informations coming from the RAM cells at the right moment along the "Clock Cycle wave" it has generated on the FSB.

    The DRAM devices you have asked me to look for, belong to the SDRAM kind; i.e.: they send their data only ONCE per Clock Cycle.


  2. #2
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    Lightbulb Discussion: Ballistix memory

    From Geek.com Discussion of Crucial's new Ballistix RAM Comments
    First, Topher, I disagree.

    Although it is true that switching from PC3200 CL3 to PC3200 CL2 will not greatly improve your performance figures, if you were to run PC5300 CL4 you would see a significant increase. The latency may actually be worse on the latter, but the increase in bandwidth would probably make up for that, particularly if you have big caches.

    And the cost isn't really so bad, 512MB of new and fast PC5300 RAM costs as much as 1GB of old and not so fast PC3200 RAM. It's certainly not as extreme an issue as $600 video cards, at least not in my opinion.

    Nerd-

    The timing numbers are rather complicated, and honestly you don't need to worry about them. But I can tell you a bit about them if you'd like.

    The four numbers stand for tCL-tRCD-tRP-tRAS.

    tCL: Often referred to as CL or CAS latency or CAS timing. This is the number that most people use/look for/understand. Basically RAM is arranged as a matrix, with rows and columns, and rows are the "big" unit (called a bank), and sequential columns within the row represent sequential memory addresses. tCL represents the number of clock cycles it takes to "select" a column (it is actually the delay between CAS signalling and retrieving valid data on the output pins).

    To give you an example of what that means in context, let's take a look at this ballistix RAM. With the PC3200 model, we have a tCL of 2, with the PC5300 we have tCL of 4. This means that the minimum time between address selection and data retrieval on the PC3200 model is 2 clock cycles (5ns) and on the PC5300 model is 4 clock cycles (6ns). Now those numbers are ignoring all other delays involved in memory access, but you can see why having a low tCL is important (for reference, most PC3200 RAM has tCL of 3 (7.5ns)).

    tRCD: This is the RAS-to-CAS Delay, which becomes obvious when you know what RAS (tRP) is.

    tRP: Commonly known as the RAS Precharge delay. This is the time it takes to switch from one row to another. This is important because not all memory accesses are sequential (the majority are, but still many are not)

    So we can tie the last three together with an example. A non-sequential memory access requires precharging a row (tRP), waiting for column accessability (tRCD), and then waiting for data availability (tCL). The PC3200 ballistix RAM will take 2 + 2 + 2 = 6 cycles (15ns), whereas on the PC5300 it will take 4 + 4 + 4 = 12 cycles (18ns). For reference, most PC3200 RAM will take 9 cycles (22.5ns).

    tRAS: This is basically the time it takes a row/bank to "recover". Once you switch to another row, you must wait tRAS before precharging it again. This number doesn't usually factor into memory access speeds, which is why you will more commonly see only a 3 number set (tCL-tRCD-tRP).

  3. #3
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    Lightbulb DDR333/PC2700 in MDD

    Change in what Crucial uses in MDD.
    Apple MDD Expansion

    "... only the RAM with 16 chips--8 boxes on both sides -- did not stall the Apple Hardware Test CD. The RAM with 8 boxes was recognized by System Profiler, however, but caused innumerable panics, and seemingly unrelated problems."
    ------------
    The original OEM Micron RAM 256MB in MDD 1.25 has 8 chips on one side. The last time I bought RAM, it was the 16-chip with 8 on each side.
    -----------

    Crucial Ballistix Memory
    After much hair pulling and back-and-forth efforts, one of our members sadly discovered that Crucial Ballistix "Tracer" memory is not programmed to work in Macs, and never should have been listed as an option with any Mac models.
    ---------------

    DDR333 Spec for G4 MDD <BLOCKQUOTE class="ip-ubbcode-quote"><font size="-1">quote:</font><HR> There should also be no problem mixing and matching DDR 333 and DDR 266 DIMMs, but the bus on the 867MHz G4 is still 133MHz and the DDR 333 DDR SDRAM will simply act like a DDR 266.

    In either case, developers should take care to follow the JEDEC Standard No. 21 - C (Appendix D). In particular, make sure to program the Serial Presence Detect (SPD) EEPROM correctly. Byte 2 of the SPD should be a 07 (hex) to indicate DDR (for PC2700 / DDR333) and byte 9 should indicate 6ns or smaller clock cycle (1/6nS = 167MHz approx.).

    The only other thing to watch out for with DDR is to remember to specifically state ALL CAS Latencies and half CAS Latencies you support (in byte 19), since we can now have CAS Latencies like 2.5. Failure to follow the specifications and to add the supported CAS Latency would prevent the DIMM from being recognized.

    Apple Tech Note QA1191 <HR></BLOCKQUOTE>
    PowerMac G4 DDR-SDRAM

  4. #4
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    Lightbulb PowerMac G4 (MDD)

    About RAM:

    Your computer, as per Apple Developer Notes: PowerMac G4 (MDD) - U2 Bridge and Memory Controller - Main Memory Bus, RAM specifications are as follows:
    • The main memory bus which connects your memory expansion modules to your internal Memory Controller (code named "U2 Bridge and Memory Controller IC"), is capable of clocking at 133MHz speed with a data width of 64-bit.
      The memory bus is an in-printed electronic circuit on your motherboard which connects the RAM expansion "rails" to where the Memory Controller (= MC) is soldered on the mother board.
      Such specification means that the bus is capable of handling up to 1GB of memory (data) per second going through it.
    • The U2 IC MC is capable of handling DDR SDRAM modules (= Double Data Rate Syncronous Dynamic Random Access Memory), capable of addressing RAM up to 266MHz.
      So, DDR SDRAM modules (184-pins) which can be fitted inside your machine, will be capable of addressing data on RAM cells up to a total capacity of 2,128MB per second (hence the specification of DDR SDRAM PC2100 modules).
    • Your MC is also programmed to read and address DDR SDRAM modules built to densities up to 512Mbits (= 64MByte) per DRAM chip (DRAMs are those "black-bug-like" little chips soldered on the SDRAM module). In short, as each DDR SDRAM module can hold up to 16 of such DRAM devices, you can fit into your Mac even DDR SDRAM modules up to 1GB of RAM each.
    • However, due to a hardware limitation in-built in both the architecture of your machine and in the firmware applicable for such machine, even if you have four RAM expansion rails, your machine won't recognize more than 2GB of addressable RAM; in other words, even if you were to instal four 1GB capable DDR SDRAM modules inside your G4, the system won't "read" more than 2GB of available RAM.
    • Thus, your best way to upgrade your G4 is to drop four 512MB or just two 1GB capable DDR SDRAM modules.
    • Keep also in mind, that you can even fit in there PC2700 capable DDR SDRAM modules, provided they are backward compatible to the PC2100 specification.
    • You will also soon learn that DDR SDRAM modules come with a CAS Latency specification. Without getting too technical, CAS Latency values of 2.5 or 3 will do fine for you. The important thing is that ALL your DDR SDRAM modules bear the SAME specifications, so as to make the job easier to your MC and, thus, avoid the occasional "system memory error".
      In short, the easiest thing to do, if I was you, would be to buy your memory modules from the same vendor and bearing the same specifications in one go, and place them inside your machine.
    • Also, keep in mind that OSX does *NOT* allow you to have any control over Virtual Memory (VM = RAM made available to the system by "engaging" space on your internal system hard disk); in addition, OSX will increase or decrease such VM size on your internal hard disk depending on the tasks it needs to do. For example, say you wont to burn on a DVD-R disk a movie which you have saved on one of your internal hard drives and that the total size of data which needs to be burned equals to 4.7GB: if you only have 512MB of RAM, then, most likely, OSX will create a VM section on your internal system HD as big as 4.7GB to safely complete the burning sequence.
    • Other specifications you should look for your expansion DDR SDRAM modules, are:
      1. 184-pin SDRAMs - Pins, are those "gold-looking" contacts at the base of the module which will connect to the RAM expansion "rails" on your mother board.
      2. 2.5 volt - that is the average voltage your internal MC will need to operate those SDRAM modules.
      3. Unbuffered - It means that the RAM expansion module bears no additional device between the chipset (Memory Controller) and the physicall memory stored inside the DRAM devices as they communicate. In other words, the expansion module allows direct communication between the Memory Controller and the RAM cells.
      4. 8-byte - It expresses the actual bandwidth data can be moved accross the RAM expansion module each second. As you need 8 bits to make 1 byte, the above is like saying that the expansion module is 64-bit wide compliant.
        The FSB bandwidth in all G4s machines, is 64-bit wide.
      5. non-parity - It means that the module must be built without a quality control method that checks the integrity of data stored in the RAM cells. Parity works by adding an extra bit of data to each byte to make the total number of 1's either odd or even. An error is detected if the parity circuit determines that this number has changed, indicating that some of the data may have been lost or otherwise corrupted. You computer performes a RAM test each time you boot it up.

    The more physical RAM you have, the merrier.

  5. #5
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    Lightbulb DDR2 G5 Memory

    From Apple Store:
    Memory

    Accelerate graphics, audio, video and scientific applications running on your Power Mac G5 with additional memory. Accessing data from main memory is much faster than accessing data from the hard drive, so the more memory your system has, the faster your system can manipulate your data. The result is faster application performance, and much greater ease of use when working with large files.

    The new 128-bit memory controller in the Power Mac G5 supports DDR2 main memory running at 533MHz. In addition to writing data at a double rate, or twice the rate of the clock speed, the memory controller increases efficiency by reordering read and write operations. By addressing two banks of SDRAM at the same time, the new Power Mac G5 can reach a memory throughput of up to 8.5 GBps. That represents a 25 percent increase over the latest Power Mac G5 and triple the throughput of the fastest Power Mac G4.

    All Power Mac G5 systems include two 256MB DIMMs for a total of 512MB of main memory. All systems will support up to 16GB of main memory using a maximum of eight 2GB DIMMs. For users in mission-critical and compute-intensive environments, there's also the option of ECC (Error Correction Code) main memory, which allows automatic correction of single-bit errors and detection of multiple-bit errors. The 128-bit memory architecture requires that memory DIMMs be installed in pairs (each DIMM is 64-bit wide) to read at the full 128-bit data width.*

    Note: Power Mac G5 systems use 533MHz DDR2 SDRAM (PC2-4200). You should always purchase RAM that has been tested and approved for your system. If you don't purchase memory directly from Apple, be sure to check with the third-party manufacturer to verify compatibility before purchase.
    Crucial PowerMac G5 Quad DDR2
    ___________________
    About Dual-Core G5s:
    Apple: DDR2
    http://www.apple.com/powermac/specs.html
    http://images.apple.com/powermac/pdf...erMacG5_TO.pdf
    http://manuals.info.apple.com/en/Pow..._Late_2005.pdf
    http://www.apple.com/powermac/pciexpress.html
    http://www.apple.com/powermac/graphics.html
    http://www.apple.com/powermac/pcix.html
    http://www.apple.com/powermac/dualcore.html
    Last edited by TZ; 10-26-2005 at 07:41 AM.

  6. #6
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    Lightbulb iMac G5 (Fall 2005)

    Memory: Up to 2.5GB DDR2 533MHz
    http://www.apple.com/imac/

    The new iMac G5 "appears" to have a single RAM slot, and they presume the computer has 512 MB on the motherboard, with an empty slot for 256, 512, 1GB or (not yet available) 2GB DIMMs." But note that the 2.5 GB configuration, using a 2 GB DIMM stick, adds $1200 to the price.
    MacIntouch iMac G5 Report

    Module Details:

    Crucial Part Number: CT477889
    Module Size: 1GB
    Package: 240-pin DIMM
    Feature: DDR2 PC2-4200
    Configuration: 128Meg x 64
    DIMM Type: UNBUFFERED
    Error Checking: NON-ECC
    Speed: 533
    SDRAM Timings: CL=4
    Specs: DDR2 PC2-4200 CL=4 UNBUFFERED NON-ECC DDR2-533 1.8V 128Meg x 64

    Approximately 5.25 in. by 1.18 in. (133.35 mm by 30 mm)

    A dual inline memory module (DIMM) consists of a number of memory components (usually black) that are attached to a printed circuit board (usually green). The gold pins on the bottom of the DIMM provide a connection between the module and a socket on a larger printed circuit board. The pins on the front and back of a DIMM are not connected to each other.

    240-pin DIMMs are used to provide DDR2 SDRAM memory for desktop computers. DDR2 is a leading-edge generation of memory with an improved architecture that allows it to transmit data very fast.

    Each 240-pin DIMM provides a 64-bit data path (72-bit for ECC or registered modules).

    Standard DDR2 240-pin DIMMs are available in DDR2 PC2-3200 SDRAM, DDR2 PC2-4200 SDRAM, and DDR2 PC2-5300 SDRAM.

    To use DDR2 memory, your system motherboard must have 240-pin DIMM slots and a DDR2-enabled chipset. A DDR2 SDRAM DIMM will not fit into a standard SDRAM DIMM socket or a DDR DIMM socket.

    The number of black components on a 240-pin DIMM can vary, but it always has 120 pins on the front and 120 pins on the back, for a total of 240. 240-pin DIMMs are approximately 5.25 inches long and 1.18 inches high, though the heights can vary. While 240-pin DDR2 DIMMs, 184-pin DDR DIMMs, and 168-pin DIMMs are approximately the same size, 240-pin DIMMs and 184-pin DIMMs have only one notch within the row of pins. The notch in a 240-pin DDR2 DIMM is closer toward the center of the module.
    Crucial iMac G5 DDR2
    Micron compact DDR and DDR2 modules.
    Micron will propose in a near future ultra compact DDR and DDR2 modules.

    With such modules, it will be possible to reduce the space allocated to RAM slots, and it will also be easier to cool down RAM modules, especially for servers where space matters. The price of such modules is still unknown.

  7. #7
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    Lightbulb ECC Memory

    ECC Memory

    There are and will always be "programming errors." But if you read the "bad RAM report" on Macintouch, DRAM can also fail due to patterns of bits.

    I've said it once, I'll say it again. There is a reason why high end workstations and servers use ECC. And one of the few reasons for not using it on the desktop is *not* that the desktop system is more stable and reliable, the opposite is true. Rather, that "desktop users" either don't want to pay extra or don't care. Well, I'd like the option. Which is why I buy Micron/Samsung rather than from a build house. However, Apple does use ECC in the XServe. I would assume then, that it would be possible to offer ECC G5s without a lot of engineering.

    Even your disk drive uses ECC memory. And even ECC isn't 100% perfect, but it is better. IBM uses what they call Chipkill memory in their POWER systems, both Intellstation, as well as in their servers. On-the-fly mapping out bad areas of memory that fail. Sort of like "bad blocks" on your disk drive.

    Standard ECC (Error Correcting Code) memory has had a considerably positive impact on server reliability. ECC memory is able to detect and correct single bit memory errors, which make up the vast majority of memory errors.

    However the increase of memory capacity (up to 32GB), the density of memory on a single DIMM (up to 1GB) and the increase in speed of the memory subsystem has significantly increased the risks of multi-bit memory errors that cannot be corrected by standard ECC memory and result in the system hanging.

    Chipkill memory has the ability to correct *multi-bit* memory errors and in doing so, increases system availability considerably. The reliability rate of standard ECC memory was measured at 91% versus 99.94% reliability of Chipkill. Chipkill Memory (pdf)
    Chipkill Memory (PDF)

    No one is free from memory errors. However, no one I know is willing to pay $200 for 512MB PC3200 in their G5.
    PC2-3200 Non Chipkill ECC DDR SDRAM RDIMM Kit $399
    ECC DDR SDRAM

    Sometimes there are panics that aren't from software bugs, but very often, a k/p is from RAM or hardware, even a PCI controller, and RAM doesn't last forever. Heat kills, and you can experience increased "bad blocks" over time. Less so with Micron/Samsung, but still possible.

    Mixing RAM is another problem. No two batches of the same, let alone from different build houses or vendors, is going to be the same, so you have timing "errors" or just variations that can't be compensated for. (That may not be technically 100% accurate way to portray what happens, but close enough I hope.)

  8. #8
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    Lightbulb Ddr2

    DDR2, PCI-E revisited

    DDR2 memory tests, which we have performed earlier, showed that its higher latency is exactly the reason why it gets defeated by the regular DDR SDRAM. Many applications demand a high memory performance, and DDR2 SDRAM employed in LGA775 platform just couldn't provide it.

    DDR2 SDRAM can be faster. xbitlabs: DDR2
    DDR2 is actually poorly named. It should be called QDR, because the clock speed of the data bus is doubled, and it is triggered by both the rising and falling edges, which means it has four times the potential bandwidth of standard SDRAM devices.

    But the bandwidth improvements come at a cost to the latency.

    The best DDR1 memory has latency values of 2-2-2. But on the other hand, DDR1 uses these low latency figures at higher base clock rates, 200MHz for DDR1-400, opposed to 133MHz for DDR2-533, which means even equal latency numbers on the DDR2 RAM will result in worse latencies than DDR1, until the base clock speeds catch up. www.geek.com
    Last edited by TZ; 10-19-2005 at 02:39 PM.

  9. #9
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    Lightbulb Ddr2 Sdram

    DDR2 memory tests, which we have performed earlier, showed that its higher latency is exactly the reason why it gets defeated by the regular DDR SDRAM. Many applications demand a high memory performance, and DDR2 SDRAM employed in LGA775 platform just couldn't provide it.

    DDR2 SDRAM can be faster. xbitlabs: DDR2
    DDR2 is actually poorly named. It should be called QDR, because the clock speed of the data bus is doubled, and it is triggered by both the rising and falling edges, which means it has four times the potential bandwidth of standard SDRAM devices.

    But the bandwidth improvements come at a cost to the latency.

    The best DDR1 memory has latency values of 2-2-2. But on the other hand, DDR1 uses these low latency figures at higher base clock rates, 200MHz for DDR1-400, opposed to 133MHz for DDR2-533, which means even equal latency numbers on the DDR2 RAM will result in worse latencies than DDR1, until the base clock speeds catch up. www.geek.com

    SHOULD I BUY CAS 4 OR CAS 3 MEMORY FOR THE DUAL-CORE?
    We ran some memory test using Xbench and MemPerf with both factory CAS 4 and third party CAS 3 memory. The most dramatic difference was seen in the fill rate test where the CAS 3 was 9% faster. Compared to the 400MHz memory in the Single-Core G5, the 533MHz memory in the Dual-Core had a fill rate of 82% faster. (See graph below.)

    Other memory tests weren't as dramatic. The average on the STREAM test showed the CAS 3 memory to only be 3% faster. More to the point, when we ran our real world tests, the times were virtually identical no matter what memory we used.
    http://www.barefeats.com/dc20.html
    Last edited by TZ; 11-01-2005 at 08:11 AM.

  10. #10
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    Lightbulb DDR2 2GB non-ECC

    Crucial is now stocking 2GB non-ECC for the PowerMac Dual and Quad G5. Part numbers are "machine specific" but seem to be basically the same.

    DDR2 PC2-4200 CL=4 UNBUFFERED NON-ECC DDR2-533 1.8V 256Meg x 64

    G5 Quad DDR2 533 $890

    # Crucial Part Number: CT479308
    # Module Size: 2GB
    # Package: 240-pin DIMM
    # Feature: DDR2 PC2-4200
    # Configuration: 256Meg x 64
    # DIMM Type: UNBUFFERED
    # Error Checking: NON-ECC
    # Speed: 533
    # SDRAM Timings: CL=4
    CT479308

    If you want CL3, Ballistix will cost you more, $1760, and the price varies by model. . Otherwise, CL5 533 will only set you back $1144 for 8GB. Or, CT479308 (above) CL4 4200 $1080.

    ________________

    Discussion of new Power Mac G5 memory details prompted some follow-ups, too:

    [Michael McGuire, pointing out Apple's PowerMacG5Late2005_TechBrief.pdf]

    "Up to 16GB of main memory Eight DIMM slots hold up to 16GB of fast new 533MHz DDR2 SDRAM. For mission-critical and compute-intensive environments, you now have the option of ECC (Error Correction Code) memory for automatic correction and detection of data errors." - Page #4

    "For users in mission-critical and compute-intensive environments, there's also the option of ECC (Error Correction Code) main memory, which allows automatic correction of single-bit errors and detection of multiple-bit errors." - Page #11

    [Norm LeMieux] ...there's potentially another issue with DDR2 that may not have existed before for Macs: high-speed memories. If you look at Crucial's Quad-compatible modules (1GB), you'll see PC2-4200 modules with 4-4-4-10 timing at the top, followed by PC2-5300 modules (which are CL=5 @ 667MHz, but probably 4-4-4-10 @ 533MHz). This is the performance when the modules are powered by the standard voltage of 1.8V.

    The high-performance Ballistix modules can do 3-3-3-12 @ 533MHz, but they require a higher voltage: 2.1V. This is fine if you have control over your memory rail, but the Mac does not. And since the SPDs are programmed with "JEDEC-standard PC2-4200 values", the OS is just going to program the memory controller to run the same (4-4-4-10). Thus, there's no point [currently, on the Mac] is buying the high-performance modules which are $160 more per 2GB kit.

    Crucial has admitted that, if the system cannot operate at 2.1V, then it will "throttle down" and run at the standard rate. This mirrors what others have been saying elsewhere on the 'Net, but hopefully there's a little more information here.
    Last edited by TZ; 12-15-2005 at 07:57 AM.

  11. #11
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    Lightbulb MacGurus DDR2 2GB RAM

    You can now buy 1 and 2GB chips (2 or 4GB kits) from MacGurus.
    DDR2 Memory for PCI Express systems.

  12. #12
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    Lightbulb

    DDR2 DRAM prices are continuing to fall through June for the most popular 512Mb 667MHz chips which fell below $2.00 to $1.92.

  13. #13
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    Lightbulb Kingston DDR3

    Kingston first low-latency DDR3

    While lower speed DDR2 can have latencies as fast as 3, DDR3 starts at 800 and the boards we have seen only allow CAS latencies as low as 5. The CAS range on better P35 boards is normally 5 to 10.

    Kingston KHX11000D3llK2/2G has found ways to provide the lowest latencies so far in DDR3. Kingston specified their new DDR3 memory at 7-7-7 at 1333 and 6-6-6 at 1066.

    Keep in mind that the actual latency in nanoseconds is what really matters, so while the number of memory cycles from

    DDR2-533 CL3 through DD2-667 CL4
    DDR2/3-800 CL5
    DDR3-1067 CL7
    DDR3-1333 CL9

    Actual latency in ns only ranges from 11.25ns (DDR2-533 CL3) to a maximum of 13.5ns (DDR3-1333 CL9).

    While CL7 may sound like a high latency, achieving that with 1333 MHz memory is actually results in a time latency of 10.5ns, and of course that's with much higher bandwidth than some of the other memory speeds.

    ANANDTECH: Low-Latency DDR3
    Last edited by TZ; 05-25-2007 at 07:24 AM.

  14. #14
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    Lightbulb Samsung DDR3

    Samsung Electronics is putting the finishing touches on its DDR3 memory chips ahead of their commercial release later this year, 21 of its DDR3 memory chips and modules have been validated by Intel. This validation, which certifies the memory chips are compatible with Intel's PC chip sets, is one of the final steps toward commercial release of the chips.

    The newer chips will offer data transfer speeds up to 1.6Gbps, twice the memory bandwidth of DDR2. That means better performance for both 3-D graphics and multithreaded applications that tap the power of multi-core processors. The chips will also consume less power -- around 1.5 volts compared to 1.8 volts for DDR2.

    DDR3 specifications.
    It is supposed to double the bandwidth to further increase data transfer speed and communication. One will have to wait for at least half a year before seeing competitive DDR3 chips with more aggressive and lower latency, speed is nothing without responsiveness. Nevertheless computer companies should quickly adopt the DDR3 SO-DIMM modules as it consumes less power than current DDR2 SODIMM. However, Apple should not adopt it before Penryn is released in the beginning of 2008.

    Apple could quickly move to DDR3 with the Mac Pro, however, which uses FB-DIMM memory modules feature a controller to optimize memory chips management, but led to high latency. This well-known weakness could be partially solved by FB-DIMM DDR3, such modules should be directly compatible with Mac Pro. Indeed, the controller does not exchange data with memory chips, so it should not be a compatibility issue.

    Volume production of DDR3 chips before the end of June, in time to start commercial sales during the second half of the year. Hynix Semiconductor. said its DDR3 chips, which go into production during the third quarter, had been validated by Intel.

    While DDR3 gets close to its commercial debut, most PC users won't see the chips in their systems until early 2009, when they replace DDR2. The crossover point where shipments of DDR3 exceed DDR2 will come in early 2009 or late 2008.

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