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Thread: G3 B&W RAM Upgrade Only 1/2 of 256MB shows in Profiler

  1. #1
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    Default G3 B&W RAM Upgrade Only 1/2 of 256MB shows in Profiler

    Just installed,a PQI PC133 256 MB SDRAM, 3.3 v, 168Pin U-DIMM, so it's unbuffered into my G3 (upgraded to a G4 via Sonnet Chip @ 800 mhz.), but on my system profiler, it only shows up as 128 MB added. Is there a compatibility problem, that only lets 1/2 of the Ram installed show up........I already have 2 64 MB & (1) 256 MB of Ram installed in the first three Dimm slots, and they all register correctly.........this is supposed to be backward compatible memory (PC133)........I also reset the PRAM.......is the fact that it is a "Dual Inline Memory Module" have something to do with it?

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    Lightbulb

    Probably wrong density and not suitable for B&W "Grackle" memory controller. that is what it sounds like, exactly.

    Also, you need 8 nanosecond DRAMs, which the 64MB chips are not. Check with DIMM First Aid in OS 9. With the Sonnet G4, though, you have effectively dropped the front side bus to run at 66 MHz instead of 100MHz. Not good.

    When in doubt, try ours, and I still like to check www.crucial.com/mac/ for best compatiblity.

    return the memory.

    Not all PC133 is backward compatible to 66MHz bus, either. But even then, the number of chips per side and configuration isn't supported on B&W in this case.

    A lot of info on B&W memory is in the Memory Reference FAQ forum or in the B&W Reference as well.

  3. #3
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    Thanks for you input TZ......The other RAM (2 @ 64 & 256) all work fine.......both of the 64 were the original installed into the system..........I've had the Sonnet G4 running for about a year now, and not noticed any bus speed issues even though I hear that it was reduced from 100 down to 66MHz.........it's been an excellent and stable option, once the fixes were employed from Sonnet! I'll run Dimm First Aid, but I agree, sounds like only 1/2 of the Ram is being recognized and I need to return this memory.........found a good memory site called www.datamem.com..........just as good as crucial.com if not better! Check it out...........thanks for your words of wisdom.......specs form the mfg PQI don't provide the density and if at backwards, whether it runs at 8 ns
    rkbrownie

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    Lightbulb

    All of the OEM 64MB SDRAM, and the only thing available, was 10 ns. And not suitable, especially with a G4 and OS X. Tons of kernel panics from everyone. There is a good feature comparion of G4s on www.xlr8yourmac.com - Sonnet G4/800 vs Daystar G4/550-600 in particular.

    You realize we sell memory, no?

    Check out MacIntouch "Bad RAM" report someday.

    When DIMM First Aid says "OK" it only means the chips have SPD code is all for CAS Letency, nothing else.

  5. #5
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    TZ--only had the Kernel problem once, and then the Sonnet patch took care of it....<Sonnet X Tune-Up 1.2.8>.......but since I commited to Sonnet and I'm pleased with the results........(their customer service has been super)...I'm not going to switch to another at this point with an older system.....and the small investment I made...vs. buying new....after this, it's going to be a G5. Now I realize you sell memory too........$39 for 256MB PC100 168 pin......that works.....Dimm First aid didn't say much.....okay!....yes the memory I added works, just not at full capacity.........rkbrownie
    rkbrownie

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    Lightbulb

    Yes, I realized you were committed to the Sonnet cpu upgrade, only to make you aware of what it does etc.

    It does make a difference in B&W if all of the memory is matched and runs identical. A G4 means memory thruput is 1.6x what a G3 offers, but also means it stresses RAM more. As does OS X with each iteration, Tiger more so than any previous.

    And the B*W unlike later G4s uses J19 RAM slot to determine CL timings for all four slots.

    What DFA "says" is whether it is 8 or 10 ns or even 7.5 (PC133 varies some), and whether CL 2-2-2 or something else. Very helpful in solving problems, which always, always begin with RAM.

  7. #7
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    You are an amazing source of info.........thanks for your input......RAM is really a strange bird......I figured, that if I already had two 64 MB in it, along with a 256 MB, that I'd add another 256MB to the last memory slot available........to help me with Tiger, should I upgrade to it from Panther OS X 10.3.9 which I'm running right now. Ideally, yes, to have all four slots filled with 256 MB SDRAMS (since this G3 maxes out at 1024 MB) would be the best, but why spend the extra $ in memory PC100 168 pin SDRAM that is becoming obsolete........I'll probably step up to G5 in another year or so.......but you're absolutely right.........it pays to have the right RAM installed to take advantage of the G4 engine.......rkbrownie
    rkbrownie

  8. #8
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    Default Extensive explanation about why wrong SDRAM density

    Dear rkbrownie,

    As TZ has correctly posted to you, I just wanted to explain you in plain words why the SDRAM module you have just bought bears the wrong density and - above all - the resoning behind our reccomendation to buy your RAM expansion modules only from reputable and reliable sources.

    <OL><LI>The single feature inside ANY computer which determines the correct RAM expansion module to use, is a chip called "MEMORY CONTROLLER". It is embedded on your motherboard and, after the CPU chip(s), is the single most important chip on the board. No modern computer would be able to function properly without it (even in the PC world).
    The Memory Controller (herein after just "MC") is responsable for presenting to the CPU (for processing purposes) all data coming from all the other compinents present inside your computer and connected (through data buses) to the motherboard (e.g.: hard disks, PCI cards, video cards, LAN connectors, sound cards, etc....). The MC will also "send back" to such components all those "I" and "O" in bits/Bytes processed by the CPU.
    In order to best coordinate data to be sent to the CPU, RAM memory is used to "park" data which will need to be processed successively.
    Thus the MC not only governs the "speed" at which the communicating bus between the RAM banks and the CPU runs at (in your B&W such speed can go up as much as 100MHz), but also governs the kind of RAM module specifications it can handle.
    The MC fitted inside the B&W G3s can only address DRAM pages built to a maximum density of 128Mbits (NOT to be confused with Mega Bytes). DRAM devices are those small, black, bug-like, chips soldered on the SDRAM module. It's inside those little black bugs that the real RAM technology resides.
    A DRAM device bearing a 128Mbits density, means that it can carry a maximum of 16 Mega Bytes of RAM data memory per single device (or "little black bug").
    Thus, if you want a SDRAM module capable of 256 Mega Bytes of memory, it MUST carry 16 of those "little black bugs" on it: 8 on each side of the module (16 x 16 = 256).
    Therefore, a more modern SDRAM module bearing only 8 such bugs while carrying a nominal total data capacity of 256 Mega Bytes, means that the "little black bugs" soldered on it are built to a higher data density of 256 Megabits. You older MC will NOT be able to exploit the full 256 Mbits of such density, totally ignoring half of such capability. Hence why your System Profiler "sees" only 128 Mega Bytes of total SDRAM module capacity.
    Moreover, since the MC chip employed inside the B&W G3s was the last "improved" version of such chip, due to various technical reasons (which I will spare you from), in order to keep the bus connecting the RAM banks to the CPU running at 100MHz, requested that the SDRAM modules could "answer" to a data query put to them by the MC, within a certain time frame at such frequency (i.e.: 100MHz).
    Such time frame is spelled as CAS LATENCY and REFRESH SEQUENCE (if you want to know more about such terminology, please read this old thread of mine), and, in the B&W case, the above MUST bear these minimum values:
    <UL><LI>CAS Latency = 2-2-2 (or just "2") @ 100MHz.
    <LI>Refresh Sequence = 8 nano seconds (or up to 125MHz).
    </UL>If any SDRAM module fitted inside your B&W machine does NOT meet such "timing requirements", the MC may be unable to correctly retrive/address data from/to them, making your whole system unstable.
    At the time when your B&W machine was released on the market by Apple, SDRAM memory certified running at 100MHz was readly available, BUT few manufacturers used to test such modules at higher frequencies (such as 125MHz).
    Today, any PC-133 (133MHz) SDRAM module will easely run safely at 125MHz and even down at 100MHz, no problems.
    <LI>The second important thing you should know, is that expanding your RAM capability inside your computer is probably the most "intimate" upgrade you can do to it, after replacing the CPU. That's why we, at MacGurus, always highly reccomend users to buy their RAM expansion modules from trusted, tested and reliable sources, even if this could mean having to spend a bit more money.
    There's nothing more frustating than having continuous system hangs and kernel panics just after having upgraded your RAM availability.
    On these very forums, we have experienced that many (if not the majority) of system instability issues, all were down to wrong or defect RAM availability.
    If you don't trust MacGurus online shop, then I would highly reccomend Crucial Technology (also an "on-line" shop).
    </OL>
    Hope the above has helped you to better understand what TZ and I are trying to advice you with.

    All the best.

    Ciao
    Costa
    ________________________

    Ab ovo usque ad mala

  9. #9
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    Default

    Ciao Costa, clear and concise as usual.

    A bit OT, but this made me wonder:

    Quote Originally Posted by TZ
    And the B*W unlike later G4s uses J19 RAM slot to determine CL timings for all four slots.
    And I thought the G4's MC took it's CL timing from what it found in the first slot. Not so?

    biggles.
    "illegitimis non carborundum"

  10. #10
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    Ciao Biggels!

    How are you doing? How was your summer?

    Quote Originally Posted by biggels
    ... A bit OT, but this made me wonder:

    <UL>Quote:
    Originally Posted by TZ
    And the B*W unlike later G4s uses J19 RAM slot to determine CL timings for all four slots.
    </UL>


    And I thought the G4's MC took it's CL timing from what it found in the first slot. Not so?
    You thought correct, as usual my dear friend. As far as I know it, all modern Memory Controllers get their SDRAM timing readings from what they find in the SPD chip soldered onto the first SDRAM module they find along the RAM expansion bays, in order of position.

    It sounds to me like an industry standard (JEDEC, perhaps?). Some MC don't even allow the booting sequence to go any further if they don't find a SDRAM module on the first RAM bay available on the motherboard.
    Some more modern MC are even programmed to look for SDRAM modules on the "paired" RAM bays - a la G5, for example - as the Front System Bus runs at very high frequencies which DDR SDRAM modules haven't yet reached (thus, the bus frequency is "shared" equally along two different RAM bays); but in this case, memory modules need to be fitted in pairs.

    I didn't point anything out to TZ, as his "mistake" is a minor sin, easely Pardoned with a couple of Pater Noster prayers... .

    In any event, his posts and his suggestions are - as always - SPOT ON !

    BTW, are you still planning that short vacation over to Milan with your familiy?

    All the best my friend, and take care.

    Ciao.

    Costa

  11. #11
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    Costa,

    summer was very busy, and no let-up yet in sight. A trip to Milan is still on the cards, just don't know when we can fit it into our busy schedules! Da Boss wants to go play tourist in Marostica next September and watch the chess match! Reckon we should make a reservation now!

    biggles.
    "illegitimis non carborundum"

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    G4's like MDD don't. In fact, it doesn't care which slot is used or empty. And some G4s will take SPD from different chips, no? Still uses the slowest of the bunch, but not just slot #1 (but non-DDR Macs have to have slots filled in order).

  13. #13
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    Quote Originally Posted by TZ
    (but non-DDR Macs have to have slots filled in order).
    TZ, that's what I should have said, the older MC takes it's timing cues from the first DRAM if finds, and it sees the lower numbered slots first. J19 could be empty.

    Can you say in which G4 things changed?
    "illegitimis non carborundum"

  14. #14
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    Default Now you have me ... !!

    Ciao TZ,

    Quote Originally Posted by TZ
    G4's like MDD don't. In fact, it doesn't care which slot is used or empty. And some G4s will take SPD from different chips, no? Still uses the slowest of the bunch, but not just slot #1 (but non-DDR Macs have to have slots filled in order).
    Well, you have inserted the "doubt" virus in my thoughts... I have just filed a question to Micron's Tech. support via e-mail.

    One thing I am sure of, though: in general (including PCs) computers employing standard 168-pins SDRAM modules have the MC getting it's timing parameters from the SDP EEPROM chip soldered on the FIRST module they find along the RAM expansion bays.

    I have the doubt that, since DDR SDRAM modules employ 184-pins, it could be possible that the MC may have enough time during the booting sequence to "read" ALL the SPD EEPROMs it finds along the RAM bus and, consequently, has in-built a program which enables it to "select" the "worst" timing scenario it finds to set it's parameters against....

    I need to make sure about it, though.

    I'll let you all know what I find out.

    Thanks for the input.

    Costa
    Last edited by Costa; 09-15-2005 at 06:51 AM. Reason: Grammar errors...

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    Lightbulb

    Hey, thanks for looking into what changed when. I like it that the MDD has a 'care-free attitude' about RAM slots.

    Grackle is less forgiving. And while it works with some mixing of SDRAM latency and speed, it works 'best' when it is all running the same, and where you pretty much MUST use the slowest RAM in the first (J19) slot.

    But with most G4s (pre-DDR) you can mix RAM of PC100/PC133 with different latency and nanosecond specification, so as long as it is programmed, it uses and reads from each slot. No surprise there.

    kaye's G5 has had some interesting configurations of 6 ns. where one make was CL2.5 and another was using CL3 for that speed (I think). For performance, nanosecond speed is much more important than latency.

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    Smile

    Hello all

    Thanks guys for the great posting of information. Following threads like this helps me a lot to remember and look for answers. Where did rkbrownie go? Wonder if he/she got the RAM going.

    Randy

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